One fine day, towards the end of my final semester (May 2019) at IIST, my professor Dr. Priyadarshnam calls me up for a meeting with the Dean R&D. He asked to attend the meeting and propose a project idea. It was about 11 AM in the morning and the meeting was scheduled at around 1 PM in afternoon. I had just woken up and was barely in my senses. I started recollecting all the thoughts and ideas by now.
Taking inspiration from ARIS which had just flown aboard PSLV-C45 (which functioned pretty well in the spent fourth stage of PSLV), I too started thinking in that direction.
During my first semester, I was working at the Satellite lab (now SSPACE) for the development of an On-board computer for small satellites. At the same time, a TTC board was also under development at the lab. Both of these boards were almost ready and all they needed was power and a 1U supporting structure.
Now that I had an OBC and a TTC, which was to fly aboard PSLV, I named it PSLV In-orbitaL testing of OBC and TTC or PILOT. I presented this idea on a two slide PPT during the meeting, and it was well appreciated. Today, after almost four years, after a few changes, the idea is materialized, and PILOT is all set to fly aboard POEM-2 of ISRO’s PSLV C-55.
As ISRO is preparing itself for the launch of its workhorse rocket PSLV on 22nd April 2023, I am eagerly waiting for PILOT to fly. I am sure this excitement is much more for the students and faculty members who have worked on the project.
To know more about PILOT, click here.